DFT is a structural way of testing which helps to detect faulty chip after fabrication by adding /designing anextra logic on circuit.
Designing an extra logic is a technique / methodology to satisfy controllable, observable, Test time, Test data, Test coverage, Fault coverage and ISO requirements.
14 weeks program |
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8 hours class classroom session |
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Every topics and subtopics are discussed in detail with practical aspects and hands-on sessions |
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Our designs are co-developed with inputs from industry experts |
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Regular assessment test to identify the areas that candidate needs to improve |
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Enable learning through regular theory and labs assignment |
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Course completion Certificate after successful completion of the program |
Trainer has 8+ years of experience in semiconductor industry, comes with a great technical background in ASIC, especially inDFT. |
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Worked on different projects with different DFT specifications in block, sub-system and Chip level. |
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Experience on DFT involved in various stages from specifications, design, development, implementation, signoff & ATE Testing stages. |
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Strong Experience in pre and post silicon activities. |
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Worked in RTL, DFT and STA. |
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Experience in people guiding / training in various stages & currently leading a team. |
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Strong hands on experience in various industry tools. |
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Strong in scripting languages like PERL, TCL etc., |
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Work efficiency and time saver comes through scripting. Hands on experience in DFT scripting. |
Module 1: Introduction to Digital design & Linux commands. |
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Module 2: Introduction to ASIC, Importance of ASIC & ASIC Flow. |
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Module 3: Introduction toDFT. Importance of DFT. |
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Module 4: DFT Flow, Inputs required for DFT. |
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Module 5: DFT Methodologies / Techniques, Design rule checks analysis & fixing, Insertion Flow.
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Module 4: ATPG / Pattern generation, Design rule checks analysis & fixing, Pattern generation Flow.
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Module 3: Simulations.
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Module 3: TCL scripting. |
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Module 3: STA basics. |
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Module 3: Final projects (Multiple). |