- What are all the SDC checks?
- What is zero wire load model (ZWLM)?
- What if you see issues during sanity checks?
- What is meant by push-down floor plan, what are contents of a pushdown file?
- What was the shape of your block?
- Is your block top down or bottom up?
- How many ports you had in your design? (both Input and output).
- What was the layers assigned to those ports in your design?
- What was the width and spacing of the port in your design?
- What was the width and spacing of the clock port in your design?
- How many layers has been assigned to the ports in your design?
- What is meaning of stacked IO ports?
- How do you calculate your die size?
- What was your starting core and std cell utilization?
- What is blockage, explain placement, routing blockages?
- What was the placing between the macros you have kept?
- If you rotate the macros? If so then what kind of macros are they?
- If you have any AMS macros (PLL) if so what extra precautions you took while placing and routing?
- What is difference between std call and macros?
- How many layers are used for macros?
- How many layers are used for std cells?
- Explain pg structure of std cells and macros?
- How do you place the macros?
- Explain macro flow guideliness?
- What is fly line analysis?
- What is mean by data flow diagram?
- What will you do if IO port density is high in a particular location?
- What is feed through?
- How will you perform feed through analysis?
- What will you do if starting utilization is very high?
- Your netlist area is grown much more than expected then what will you do.
- What is do not use & do not touch cells?
- Who will provide list of those cells and why they are being marked as do not use?
- What kind of macros you had in your design and how many pins are there and what layers signal and power pins were?
- How do you calculate the channel width? What was the channel width you have used in the design?
- What will you do if you have congestion between the macros?
- How do you differentiate std cells and macros in the tool?
- What is power routing?
- What was the power nets names in your design?
- What is mean by direct PG connection and why do we need to do it?
- What layers you have used for power routing?
- What is stack via?
- Explain power routing structure?
- What is RDL layer (topmost layer)?
- How will you plan your channels, what are the basic things you have to look at while planning channels?
- How do you verify if there are pg open and short?
- What will you do if you find pg open?
- Setup time equation?
- Hold time equation?
- Differences between flop and a latch?
